New AI Adapts Circuit Representations for Better Bayesian Optimization

A new deep-kernel Bayesian optimization framework, named TTARO (Test-Time Analog Representation Adaptation for Bayesian Optimization), has been developed to enhance the efficiency of analog circuit topology search. Traditional Bayesian optimization methods often use fixed circuit embeddings, which can lead to a misalignment between the learned representation and the actual figure of merit being optimized. TTARO addresses this by dynamically adjusting these circuit representations throughout the optimization process. The framework starts with pre-trained circuit embeddings and then jointly learns a nonlinear feature transformation and a Gaussian-process surrogate model. This learning process is continuous, updating the representation and surrogate after each new circuit evaluation. By integrating newly observed performance data into the representation learning, TTARO effectively refines the search space, making it more congruent with the optimization goal. Experiments demonstrate that TTARO significantly outperforms conventional methods, reducing regret AUC by an average of 15.2% compared to standard Bayesian optimization and 20.7% against Deep Kernel Learning.